goldennet

2022-06-30

爱普科技正式加入UCIe产业联盟 将促进爱普VHM应用,协助发展全球Chiplet生态系统

爱普科技宣布正式加入UCIe(Universal Chiplet Interconnect Express)产业联盟。作为台湾IC设计商中首批加入UCIe产业联盟的企业,爱普将积极参与UCIe产业联盟,与其他成员共同致力于UCIe 1.0版本规范和新一代UCIe技术标准的研究与应用,一同创建更健全的chiplet生态系统。

 


全球领先的客制化存储器解决方案商爱普科技(爱普,股票代码TW6531)今日宣布正式加入UCIe(Universal Chiplet Interconnect Express)产业联盟。作为台湾IC设计商中首批加入UCIe产业联盟的企业,爱普将积极参与UCIe产业联盟,与其他成员共同致力于UCIe 1.0版本规范和新一代UCIe技术标准的研究与应用,一同创建更健全的chiplet生态系统。



UCIe,又称芯粒互连产业联盟,是由半导体产业中的领先厂商组成,包括国际大厂如Google Cloud、英特尔、Meta、微软、AMD、高通、三星,及台湾厂商如台积电及日月光。此十家企业于2022年3月共同成立UCIe,期能将芯粒互连技术标准化。目前联盟已建立了UCIe 1.0标准,并预计以此促成chiplet接口规范的标准化,以形成基础架构供各种芯片互连。作为一种开放的互连规范,业界预期 UCIe能促成胶水芯片生态系统的建构,使chiplet能在封装层级实现普遍互联和开放的生态系统,让业界突破摩尔定律的限制。



近年来数字转型、5G、HPC、物联网等需求及应用,带动了对半导体芯片的需求、加速了半导体新技术的进程。人工智能及高效能运算(AI/HPC)等应用的快速成长,更使得半导体制程对封装的要求愈来愈高。在此背景下,新一代异质芯片设计架构,如芯粒(chiplet)、异质整合与相关之先进封装技术,逐渐成为在业界中窜起的新领域。爱普的全新DRAM接口的异质整合高带宽存储器,亦即爱普的VHM™(Very High-Bandwidth Memory)技术,已于2021年成功量产。爱普提供的VHM™产品,包含了客制化DRAM设计及DRAM与逻辑芯片的整合接口VHMLInK™。藉由3D堆栈封装的异质整合技术,爱普的VHM™技术可支持芯粒设计架构。透过WoW (Wafer-on-wafer)技术,爱普以先进封装技术将逻辑运算核心与存储器整合为单一芯片,为业界提供优异的存储器解决方案。



爱普AI事业部副总刘景宏表示:“爱普一直积极拓展新的终端应用市场,尤其正打造AI事业部之应用生态系统。边缘运算、高速运算及人工智能等各类应用场景,都使得chiplet的应用提升、一并带动与其相关的客制化存储器解决方案的整合。爱普已在2021年成功实现了WoW技术的量产,作为市场中的客制化存储器领先厂商,我们具有独特的产业地位。展望未来,希望加入UCIe联盟后,爱普能携手产业的领先者一同贡献并打造全新的chiplet生态系统。”

探索其他单元

2022-07-06

为强化公司治理 爱普*进行人事调整

爱普科技召开董事会,会中通过总经理任命案,自7月1日起总经理一职将由原任IoT事业部资深副总经理洪志勋升任。

2022-06-07

爱普科技推出全新超高速512Mb UHS PSRAM及超低功耗32Mb ULS PSRAM

爱普科技今日宣布推出全新512Mb UHS(Ultra High Speed)系列产品AP351216C/AP351208和32Mb ULS(Ultra Low Swing)系列产品AP43208B。

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