S-SiCapTM Interposer IP
AP Memory provides interposer with S-SiCapTM benefit from DRAM fabrication process technology. DRAM process contributes to lower cap. height with thinner interposer and less parasitic RC of TSV. S-SiCapTM Interposer also allow higher cap. density compared to deep trench cap solution.
Key Features
- S-SiCapTM IP Cap. Density: 1200nF/mm^2
- Max. operation voltage: 1.5V
- Equivalent Serial Inductor (ESL): <0.2pH
- Equivalent Serial Resistance (ESR): 0.7Ω
- Insulation : >10GΩ